| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-06-02 | Remove redundant logic ALL_SUPPORTED. (#6664) | Aina Niemetz |
| 2021-03-06 | Remove SMT-LIB 2.5 and 2.0 support. (#6068) | Mathias Preiner |
| 2016-10-21 | Move slow regress0 benchmarks to regress1, increment regress1 through regress3. | ajreynol |
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index : cvc5.git | |
| CVC4 is an efficient open-source automatic theorem prover for satisfiability modulo theories (SMT) problems. | git repository hosting |
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