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| author | Aina Niemetz <aina.niemetz@gmail.com> | 2019-05-15 10:21:33 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-15 10:21:33 -0700 |
| commit | 391a29c63f350d6b67b75e2676abe40c1477ca5e (patch) | |
| tree | df20d8af54d7d7d33d5ab41e7f2401c51a10d2dc /test/regress/regress2/sygus/pbe_bvurem.sy | |
| parent | e110e5c204d566c58068612390e83a45bc55255f (diff) | |
| parent | bc550fa115401256616042ccb7a559ec252e319b (diff) | |
Merge branch 'master' into fixEagerModelsfixEagerModels
Diffstat (limited to 'test/regress/regress2/sygus/pbe_bvurem.sy')
| -rw-r--r-- | test/regress/regress2/sygus/pbe_bvurem.sy | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/test/regress/regress2/sygus/pbe_bvurem.sy b/test/regress/regress2/sygus/pbe_bvurem.sy new file mode 100644 index 000000000..fc715a645 --- /dev/null +++ b/test/regress/regress2/sygus/pbe_bvurem.sy @@ -0,0 +1,32 @@ +; EXPECT: unsat +; COMMAND-LINE: --sygus-out=status +(set-logic BV) +(define-sort BV () (_ BitVec 8)) +(synth-fun IC ((s BV) (t BV)) Bool + ((Start Bool ( + true + false + (ite Start Start Start) + (= (bvmul StartBv s) t) + )) + (StartBv BV ( + s + t + #x00 + #x01 + #x7E + (bvnot StartBv) + (bvmul StartBv StartBv) + (bvudiv StartBv StartBv) + (bvurem StartBv StartBv) + (bvand StartBv StartBv) + )) +)) +(constraint (not (IC (_ bv32 8) (_ bv187 8) ))) +(constraint (not (IC (_ bv102 8) (_ bv15 8) ))) +(constraint (not (IC (_ bv92 8) (_ bv85 8) ))) +(constraint (IC (_ bv39 8) (_ bv214 8) )) +(constraint (IC (_ bv155 8) (_ bv82 8) )) +(constraint (IC (_ bv53 8) (_ bv98 8) )) +(constraint (IC (_ bv41 8) (_ bv47 8) )) +(check-synth) |