| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-02-02 | Fix remaining synthesis solution regressions (#1557) | Andrew Reynolds | |
| 2018-02-02 | Option to check solutions produced by SyGuS solver (#1553) | Haniel Barbosa | |
| 2017-11-03 | Sygus clean main (#1297) | Andrew Reynolds | |
| * Remove front end hack for sygus. * Remove other hack, add sygus solution output mode. * Clang format * Minor * Fix * Minor * Remove unused field. | |||
| 2016-05-18 | Refactor modes for sygus+single invocation. Add option --inst-rlv-cond. ↵ | ajreynol | |
| Minor fixes for inst max level. | |||
| 2015-07-25 | Add option --sygus-inv-templ for synthesizing strengthening/weakening of ↵ | ajreynol | |
| pre/post conditions. Dump synth by default in sygus, update regressions. Set better defaults for induction. Fix bug in related to IFF and EQUAL in sygus grammar. | |||
| 2015-05-11 | Add missing regression. | ajreynol | |
 |
index : cvc5.git | |
| CVC4 is an efficient open-source automatic theorem prover for satisfiability modulo theories (SMT) problems. | git repository hosting |
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