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-rw-r--r--test/regress/CMakeLists.txt1
-rw-r--r--test/regress/regress0/bv/div_mod.cvc10
2 files changed, 11 insertions, 0 deletions
diff --git a/test/regress/CMakeLists.txt b/test/regress/CMakeLists.txt
index 5c31c4fe1..b92f767b2 100644
--- a/test/regress/CMakeLists.txt
+++ b/test/regress/CMakeLists.txt
@@ -289,6 +289,7 @@ set(regress_0_tests
regress0/bv/core/slice-18.smtv1.smt2
regress0/bv/core/slice-19.smtv1.smt2
regress0/bv/core/slice-20.smtv1.smt2
+ regress0/bv/div_mod.cvc
regress0/bv/divtest_2_5.smt2
regress0/bv/divtest_2_6.smt2
regress0/bv/eager-inc-cadical.smt2
diff --git a/test/regress/regress0/bv/div_mod.cvc b/test/regress/regress0/bv/div_mod.cvc
new file mode 100644
index 000000000..3f31bdd70
--- /dev/null
+++ b/test/regress/regress0/bv/div_mod.cvc
@@ -0,0 +1,10 @@
+% EXPECT: entailed
+
+x : BITVECTOR(4);
+
+QUERY
+( BVUDIV(x, 0bin0000) = 0bin1111 ) AND
+( BVUREM(x, 0bin0000) = x ) AND
+( BVSDIV(x, 0bin0000) = 0bin1111 OR BVSDIV(x, 0bin0000) = 0bin0001 ) AND
+( BVSREM(x, 0bin0000) = x ) AND
+( BVSMOD(x, 0bin0000) = x );
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