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Diffstat (limited to 'test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2')
| -rw-r--r-- | test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2 | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2 b/test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2 index da48f5e68..c26cde173 100644 --- a/test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2 +++ b/test/regress/regress0/quantifiers/small-bug1-fixpoint-3.smt2 @@ -1,5 +1,6 @@ ; COMMAND-LINE: --cbqi-all --no-check-models ; EXPECT: sat +;AJR:BROKEN (set-logic UFBV) (set-info :status sat) (declare-fun Verilog__main.impl_PC_valid_64_1_39_!3 (Bool Bool Bool Bool Bool Bool Bool Bool Bool Bool Bool) Bool) |