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| author | Andrew Reynolds <andrew.j.reynolds@gmail.com> | 2021-06-30 07:52:35 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-06-30 09:52:35 -0300 |
| commit | a633cd03e1fe118a0e5a7b50db25395b387173a1 (patch) | |
| tree | 4e2aec1a30a0fc5bc90b6731bf0b56d9ed8b181d /test | |
| parent | 14944f1115fa2ad20afa3873626c2804731aff71 (diff) | |
Fix pre vs. post-rewrite in proofs for theory preprocessor (#6801)
This changes an annotation of a step of rewriting from "post" to "pre" in the theory preprocessor.
Fixes #6754.
Diffstat (limited to 'test')
| -rw-r--r-- | test/regress/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | test/regress/regress0/preprocess/issue6754-tpp.smt2 | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/test/regress/CMakeLists.txt b/test/regress/CMakeLists.txt index 63d34ebe1..da67705f5 100644 --- a/test/regress/CMakeLists.txt +++ b/test/regress/CMakeLists.txt @@ -794,6 +794,7 @@ set(regress_0_tests regress0/preprocess/circuit-prop.smt2 regress0/preprocess/issue5729-rewritten-assertions.smt2 regress0/preprocess/issue5943-non-clausal-simp.smt2 + regress0/preprocess/issue6754-tpp.smt2 regress0/preprocess/preprocess_00.cvc regress0/preprocess/preprocess_01.cvc regress0/preprocess/preprocess_02.cvc diff --git a/test/regress/regress0/preprocess/issue6754-tpp.smt2 b/test/regress/regress0/preprocess/issue6754-tpp.smt2 new file mode 100644 index 000000000..9d34429c6 --- /dev/null +++ b/test/regress/regress0/preprocess/issue6754-tpp.smt2 @@ -0,0 +1,5 @@ +(set-logic ALL) +(set-info :status unsat) +(declare-fun a () Bool) +(assert (> (mod (ite a 0 1) 2) 1)) +(check-sat) |