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| author | ajreynol <andrew.j.reynolds@gmail.com> | 2015-07-25 16:40:54 +0200 |
|---|---|---|
| committer | ajreynol <andrew.j.reynolds@gmail.com> | 2015-07-25 16:40:54 +0200 |
| commit | c0079b3110a81f2ff993b7f86782266380dd102e (patch) | |
| tree | c39d61ecc3857ebe5af75bd41ef7c11353e0824a /test/regress/regress0/sygus/nflat-fwd-3.sy | |
| parent | 7dcb635088e73b508dbe00ae7fe08dae99968416 (diff) | |
Add option --sygus-inv-templ for synthesizing strengthening/weakening of pre/post conditions. Dump synth by default in sygus, update regressions. Set better defaults for induction. Fix bug in related to IFF and EQUAL in sygus grammar.
Diffstat (limited to 'test/regress/regress0/sygus/nflat-fwd-3.sy')
| -rw-r--r-- | test/regress/regress0/sygus/nflat-fwd-3.sy | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/regress/regress0/sygus/nflat-fwd-3.sy b/test/regress/regress0/sygus/nflat-fwd-3.sy index bd7c79e3e..9065a1025 100644 --- a/test/regress/regress0/sygus/nflat-fwd-3.sy +++ b/test/regress/regress0/sygus/nflat-fwd-3.sy @@ -1,5 +1,5 @@ ; EXPECT: unsat -; COMMAND-LINE: --cegqi-si +; COMMAND-LINE: --cegqi-si --no-dump-synth (set-logic LIA) (synth-fun f ((x Int)) Int ((Start Int ((+ (+ Con Con) Con) x)) |