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| author | Aina Niemetz <aina.niemetz@gmail.com> | 2017-12-20 18:27:39 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-12-20 18:27:39 -0800 |
| commit | f9149d3b3e785950a846fb195bf9fa9cb1a2d94a (patch) | |
| tree | c69c90377a6c24abbc9c608a767507740abfd3b6 /test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2 | |
| parent | 13cc0e94ac8892fa1cefa53ff1c884d154894b58 (diff) | |
Add explicit disequality handling when generating side condition for CBQI BV. (#1447)
This refactors solveBvLit to support explicit handling of disequalities (and, in the next step, inequalities) when generating side conditions.
Diffstat (limited to 'test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2')
| -rw-r--r-- | test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2 | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2 b/test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2 new file mode 100644 index 000000000..216a98531 --- /dev/null +++ b/test/regress/regress0/quantifiers/qbv-test-invert-bvadd-neq.smt2 @@ -0,0 +1,10 @@ +; COMMAND-LINE: --cbqi-bv --cbqi-bv-ineq=keep --no-cbqi-full +; EXPECT: unsat +(set-logic BV) +(set-info :status unsat) +(declare-fun a () (_ BitVec 8)) +(declare-fun b () (_ BitVec 8)) + +(assert (forall ((x (_ BitVec 8))) (= (bvadd x a) b))) + +(check-sat) |