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| author | Andrew Reynolds <andrew.j.reynolds@gmail.com> | 2017-10-12 14:07:05 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-10-12 14:07:05 -0500 |
| commit | 5031c6d9a08c84a6e8fe5019c6e278b8b2d7a238 (patch) | |
| tree | 9a1a61a9ccfcccbf9c977fc53b8a1394286be47c /test/regress/regress0/quantifiers/qbv-inequality2.smt2 | |
| parent | ebd9c958a0c20e37cc0e1a79be26afd525dd8fb9 (diff) | |
Initial support for solving bit-vector inequalities (#1229)
* Initial support for solving bit-vector inequalities in cegqi-bv using conversion to positive equality + model value slack.
* Clang format, remove heuristic.
* Update regressions.
* Simplify interface for CegInstantiator
Diffstat (limited to 'test/regress/regress0/quantifiers/qbv-inequality2.smt2')
| -rw-r--r-- | test/regress/regress0/quantifiers/qbv-inequality2.smt2 | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/regress/regress0/quantifiers/qbv-inequality2.smt2 b/test/regress/regress0/quantifiers/qbv-inequality2.smt2 new file mode 100644 index 000000000..d53715a2d --- /dev/null +++ b/test/regress/regress0/quantifiers/qbv-inequality2.smt2 @@ -0,0 +1,11 @@ +; COMMAND-LINE: --cbqi-bv +; EXPECT: sat +(set-logic BV) +(set-info :status sat) +(declare-fun a () (_ BitVec 32)) +(declare-fun b () (_ BitVec 32)) + + +(assert (forall ((x (_ BitVec 32))) (or (bvuge x (bvadd a b)) (bvule x b)))) + +(check-sat) |