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| author | Andrew Reynolds <andrew.j.reynolds@gmail.com> | 2018-01-02 16:12:45 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-01-02 16:12:45 -0600 |
| commit | ce6d8fde786eb6b4bb658ba83afd384d02853948 (patch) | |
| tree | 0f5849c8f814ce647f7c809ee2cb416da4b4c457 /test/regress/regress0/bv/mul-neg-unsat.smt2 | |
| parent | 05059fe3c92412163cb817cbd4c38e4d98a02bb7 (diff) | |
Rewrites for BitVector multiplication (#1465)
Diffstat (limited to 'test/regress/regress0/bv/mul-neg-unsat.smt2')
| -rw-r--r-- | test/regress/regress0/bv/mul-neg-unsat.smt2 | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/regress/regress0/bv/mul-neg-unsat.smt2 b/test/regress/regress0/bv/mul-neg-unsat.smt2 new file mode 100644 index 000000000..751a8a339 --- /dev/null +++ b/test/regress/regress0/bv/mul-neg-unsat.smt2 @@ -0,0 +1,6 @@ +(set-logic QF_BV) +(set-info :status unsat) +(declare-fun a () (_ BitVec 32)) +(declare-fun b () (_ BitVec 32)) +(assert (not (= (bvmul a b) (bvmul (bvneg a) (bvneg b))))) +(check-sat)
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