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authorAndrew Reynolds <andrew.j.reynolds@gmail.com>2013-02-24 16:37:46 -0600
committerAndrew Reynolds <andrew.j.reynolds@gmail.com>2013-02-24 16:37:46 -0600
commitc71ec272d5ef58bfa147507bdbb370f2e288d154 (patch)
tree8bf3b84a476fa7fff798158e6b58697399c7b966 /src/theory/quantifiers/instantiation_engine.cpp
parentdeb304550fbb6e19346319ec24d83e0650c64e91 (diff)
added option --model-u-dt-enum for outputting uninterpreted sorts as datatype enumerations + minor update to array rewriter to improve output for this option, minor refactoring of representative selection for quantifier instantiation, initial draft of disequality propagation option --uf-ss-deq-prop, other refactoring of uf strong solver, fixed bug 496, improvement for fmf enumeration of finite built-in sorts
Diffstat (limited to 'src/theory/quantifiers/instantiation_engine.cpp')
-rw-r--r--src/theory/quantifiers/instantiation_engine.cpp22
1 files changed, 12 insertions, 10 deletions
diff --git a/src/theory/quantifiers/instantiation_engine.cpp b/src/theory/quantifiers/instantiation_engine.cpp
index 53977ee4f..75cc10615 100644
--- a/src/theory/quantifiers/instantiation_engine.cpp
+++ b/src/theory/quantifiers/instantiation_engine.cpp
@@ -84,16 +84,18 @@ bool InstantiationEngine::doInstantiationRound( Theory::Effort effort ){
//add cbqi lemma
//get the counterexample literal
Node ceLit = d_quantEngine->getTermDatabase()->getCounterexampleLiteral( f );
- //require any decision on cel to be phase=true
- d_quantEngine->getOutputChannel().requirePhase( ceLit, true );
- Debug("cbqi-debug") << "Require phase " << ceLit << " = true." << std::endl;
- //add counterexample lemma
- NodeBuilder<> nb(kind::OR);
- nb << f << ceLit;
- Node lem = nb;
- Debug("cbqi-debug") << "Counterexample lemma : " << lem << std::endl;
- d_quantEngine->getOutputChannel().lemma( lem );
- addedLemma = true;
+ if( !ceLit.isNull() ){
+ //require any decision on cel to be phase=true
+ d_quantEngine->getOutputChannel().requirePhase( ceLit, true );
+ Debug("cbqi-debug") << "Require phase " << ceLit << " = true." << std::endl;
+ //add counterexample lemma
+ NodeBuilder<> nb(kind::OR);
+ nb << f << ceLit;
+ Node lem = nb;
+ Debug("cbqi-debug") << "Counterexample lemma : " << lem << std::endl;
+ d_quantEngine->getOutputChannel().lemma( lem );
+ addedLemma = true;
+ }
}
}
if( addedLemma ){
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